Highly Reliable and Low Power SSD Using Asymmetric Coding and Stripe Bitline-Pattern Elimination Programming.
Shuhei TanakamaruChinglin HungKen TakeuchiPublished in: IEEE J. Solid State Circuits (2012)
Keyphrases
- low power
- highly reliable
- power consumption
- high speed
- low cost
- deblocking filter
- single chip
- high power
- coding scheme
- digital signal processing
- low power consumption
- vlsi architecture
- solid state
- cmos technology
- coding method
- image sensor
- power reduction
- logic circuits
- vlsi circuits
- wireless transmission
- coding efficiency
- low density parity check