Transition count testing of CMOS combinational circuits.
K. S. ManjunathDamu RadharkrishnanPublished in: Great Lakes Symposium on VLSI (1991)
Keyphrases
- delay insensitive
- asynchronous circuits
- high speed
- analog vlsi
- circuit design
- logic circuits
- vlsi circuits
- low power
- low cost
- cmos technology
- power consumption
- floating gate
- random access memory
- low voltage
- digital circuits
- test cases
- computer vision
- neural network
- analog circuits
- power dissipation
- power reduction
- chip design
- database