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PD/SOI SRAM performance in presence of gate-to-body tunneling current.
Rajiv V. Joshi
Ching-Te Chuang
S. K. H. Fung
Fari Assaderaghi
Melanie Sherony
I. Yang
Ghavam V. Shahidi
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2003)
Keyphrases
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power consumption
low voltage
real time
neural network
case study
data sets
data mining
high speed
short circuit