CMOS Realization of a Quantized-Output Classifier Circuit.
Merih YildizShahram MinaeiIzzet Cem GöknarPublished in: ICECS (2006)
Keyphrases
- circuit design
- high speed
- analog vlsi
- delay insensitive
- cmos technology
- input data
- low voltage
- power consumption
- training data
- vlsi circuits
- training examples
- classifier systems
- classification process
- linear classifiers
- low power
- support vector
- classification rate
- training samples
- electronic circuits
- power dissipation
- classification algorithm
- feature selection
- classifier combination
- digital circuits
- svm classifier
- classification method
- chip design
- multiple classifiers
- analog circuits
- multiple input
- class labels
- parallel processing
- feature space