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A Practical Load-optimized VCO Design for Low-jitter 5V 500 MHz Digital Phase-locked Loop.

Chua-Chin WangYu-Tsun ChienYing-Pei Chen
Published in: VLSI Design (2000)
Keyphrases
  • phase locked loop
  • real world
  • high speed
  • case study
  • load balancing
  • multiscale
  • expert systems
  • user interface
  • control system
  • wavelet transform