Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits.

Ching-Te Chuang Rajiv V. Joshi Ruchir Puri Keunwoo Kim

Published in: ISQED (2003)

Keyphrases

design considerations
random access memory
low voltage
silicon on insulator
analog vlsi
delay insensitive
cmos technology
circuit design
vlsi circuits
high speed
power dissipation
pedagogical agents
low power
asynchronous circuits