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Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores.
Anuja Sehgal
Fang Liu
Sule Ozev
Krishnendu Chakrabarty
Published in:
DATE (2005)
Keyphrases
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mixed signal
low power
multi channel
vlsi circuits
digital circuits
low cost
power consumption
cmos technology
high speed
multi view
analog vlsi