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Graphene-PLA (GPLA): a Compact and Ultra-Low Power Logic Array Architecture.
Valerio Tenace
Andrea Calimera
Enrico Macii
Massimo Poncino
Published in:
ACM Great Lakes Symposium on VLSI (2016)
Keyphrases
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ultra low power
management system
architectural design
data flow
multi valued
programmable logic
reasoning engine
knowledge base
modal logic
low power
network architecture
design considerations
asynchronous circuits
linear array
logic synthesis