High Performance Connected Components Labeling on FPGA.
Costantino GranaDaniele BorghesaniPaolo SantinelliRita CucchiaraPublished in: DEXA Workshops (2010)
Keyphrases
- connected components
- connected component labeling
- binary images
- low power consumption
- low cost
- high speed
- field programmable gate array
- graph mining
- hardware implementation
- connected component analysis
- grey levels
- low power
- level set
- image segmentation
- power consumption
- image analysis
- image enhancement
- edge detection
- real world graphs
- computer vision