The Effect of LUT and Cluster Size on a Tree Based FPGA Architecture.
Umer FarooqZied MarrakchiHayder MrabetHabib MehrezPublished in: ReConFig (2008)
Keyphrases
- hardware implementation
- hardware architecture
- hardware design
- real time
- software implementation
- fpga implementation
- management system
- parallel architecture
- hardware architectures
- high speed
- systolic array
- field programmable gate array
- fpga technology
- dedicated hardware
- data clustering
- cluster analysis
- clustering algorithm
- data flow
- hierarchical clustering
- signal processing
- fpga device
- parallel hardware
- computational complexity
- data structure