Design of an Adaptive and Reliable Network on Chip Router Architecture Using FPGA.

Khyamling Parane Prabhu B. M. Prasad Basavaraj Talawar

Published in: VLSI-DAT (2019)

Keyphrases

network on chip
packet switched
hardware design
hardware architecture
power dissipation
multi processor
routing algorithm
design methodology
network simulator
real time
single chip
hardware implementation
low cost
signal processing
cmos technology
reconfigurable hardware