A low power and small area all digital delay-locked loop based on ring oscillator architecture.
Jiapeng ZhengWei LiXueqing LuYuhua ChengYangyuan WangPublished in: Sci. China Inf. Sci. (2012)
Keyphrases
- low power
- mixed signal
- low cost
- vlsi architecture
- power consumption
- high speed
- vlsi circuits
- power dissipation
- cmos image sensor
- cmos technology
- multi channel
- single chip
- feedback loop
- wireless transmission
- nm technology
- high power
- analog to digital converter
- digital signal processing
- gate array
- real time
- low power consumption
- digital circuits
- signal processor
- image processing
- logic circuits
- embedded systems
- digital camera