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A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity.

Hao WuYong ChenYiyang YuanJinshan YueXiangqu FuQirui RenQing LuoPui-In MakXinghua WangFeng Zhang
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2024)
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