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Sense amplifier offset characterisation and test implications for low-voltage SRAMs in 65 nm.

Dhruv PatelDerek WrightManoj Sachdev
Published in: ETS (2018)
Keyphrases
  • low voltage
  • cmos technology
  • power line
  • leakage current
  • low power
  • object oriented
  • learning styles
  • design considerations