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High-speed VLSI implementation of Digit-serial Gaussian normal basis Multiplication over GF(2m).
Bahram Rashidi
Sayed Masoud Sayedi
Reza Rezaeian Farashahi
Published in:
IACR Cryptol. ePrint Arch. (2016)
Keyphrases
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edge detector
vlsi implementation
high speed
edge detection
vlsi architecture
low power
fir filters
associative memory
real time
principal component analysis