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SAT-attack Resilience Measure for Access Restricted Circuits.
Saran Phatharodom
Avesta Sasan
Ioannis Savidis
Published in:
ACM Great Lakes Symposium on VLSI (2021)
Keyphrases
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distance measure
high speed
correlation coefficient
access control
sat solvers
countermeasures
satisfiability problem
digital circuits
boolean satisfiability
analog circuits
asynchronous circuits
logic synthesis