SAT-attack Resilience Measure for Access Restricted Circuits.

Saran Phatharodom Avesta Sasan Ioannis Savidis

Published in: ACM Great Lakes Symposium on VLSI (2021)

Keyphrases

distance measure
high speed
correlation coefficient
access control
sat solvers
countermeasures
satisfiability problem
digital circuits
boolean satisfiability
analog circuits
asynchronous circuits
logic synthesis