Design of Parity Testable Combinational Circuits.

Bhargab B. Bhattacharya Sharad C. Seth

Published in: IEEE Trans. Computers (1989)

Keyphrases

logic circuits
neural network
design process
building blocks
high speed
high level synthesis
circuit design
design decisions
user interface
case study
data sets
database
knowledge based systems
low cost
data model
digital circuits
real world