Login / Signup

A $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros.

Hao JiangJiapei ZhengYunzhengmao WangJinshan ZhangHaozhe ZhuLiangjian LyuYingping ChenChixiao ChenQi Liu
Published in: ISCAS (2023)
Keyphrases