Synthesizable HDL generation method for configurable VLIW processors.
Yuki KobayashiShinsuke KobayashiKoji OkudaKeishi SakanushiYoshinori TakeuchiMasaharu ImaiPublished in: ASP-DAC (2004)
Keyphrases
- generation method
- parallel processing
- parallel algorithm
- feature generation
- parallel computing
- field programmable gate array
- high end
- design methodology
- hardware design
- instruction set
- level parallelism
- parallel computation
- multiprocessor systems
- single processor
- distributed memory
- database systems
- embedded processors
- list scheduling
- multi core processors
- parallel programming
- parallel execution
- parallel processors
- neural network
- search algorithm
- social networks
- artificial intelligence