Low voltage LNA implementations in 90 nm CMOS technology for multistandard GNSS.

Jacek Gradzki Tomasz Borejko Witold A. Pleskacz

Published in: DDECS (2009)

Keyphrases

cmos technology
low voltage
low power
parallel processing
power consumption
power line
low cost
mixed signal
efficient implementation
image sensor
power dissipation
random access memory
high speed
real time
leakage current
silicon on insulator