Optimization-based reconfigurable approach for low-power 3D chip-multiprocessors.
Aniseh DorostkarArghavan AsadMahmood FathyFarah MohammadiPublished in: LASCAS (2018)
Keyphrases
- low power
- low cost
- high speed
- single chip
- mixed signal
- low power consumption
- power reduction
- power consumption
- cmos technology
- high power
- image sensor
- vlsi circuits
- power dissipation
- nm technology
- signal processor
- wireless transmission
- digital signal processing
- real time
- vlsi architecture
- logic circuits
- hardware and software
- ultra low power
- high density
- gate array
- general purpose