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Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance.
Keith A. Bowman
James W. Tschanz
Muhammad M. Khellah
Maged Ghoneima
Yehea I. Ismail
Vivek De
Published in:
ISLPED (2006)
Keyphrases
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power dissipation
power consumption
low power
high speed
input output
chip design
low cost
cmos technology
web services
signal processing
digital signal processing
neural network
physical design
critical path
level parallelism
phase locked loop