An Automated Flow for Arithmetic Component Generation in Field-Programmable Gate Arrays.
Alastair M. SmithGeorge A. ConstantinidesPeter Y. K. CheungPublished in: ACM Trans. Reconfigurable Technol. Syst. (2010)
Keyphrases
- field programmable gate array
- hardware implementation
- pipelined architecture
- parallel computing
- programmable logic
- embedded systems
- hardware design
- computing systems
- hardware architecture
- fpga technology
- host computer
- fpga implementation
- parallel architectures
- digital signal processing
- image processing
- massively parallel
- image processing algorithms
- high end
- application specific integrated circuits
- hw sw
- fpga device
- xilinx virtex
- hardware description language
- markov random field
- computer vision
- hardware software co design