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A Technique for Designing Totally Self-Checking Domino Logic Circuits.
C. K. Tang
Parag K. Lala
James Patrick Parkerson
Published in:
ISQED (2005)
Keyphrases
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logic circuits
low power
tunnel diode
functional decomposition
logic synthesis
gate array
image analysis
low cost
high speed
graphical models
power consumption
efficient implementation
data flow