Adaptive Row Addressing for Cost-Efficient Parallel Memory Protocols in Large-Capacity Memories.
Dmitry KnyagininVassilis PapaefstathiouPer StenströmPublished in: MEMSYS (2016)
Keyphrases
- cost efficient
- memory capacity
- associative memory
- parallel hardware
- distributed shared memory
- computing power
- multi threaded
- memory size
- level parallelism
- memory requirements
- storage capacity
- memory footprint
- governmental organizations
- limited memory
- authentication protocol
- real time
- massively parallel
- parallel implementation
- queuing systems
- main memory