Prediction router: Yet another low latency on-chip router architecture.

Hiroki Matsutani Michihiro Koibuchi Hideharu Amano Tsutomu Yoshinaga

Published in: HPCA (2009)

Keyphrases

low latency
network on chip
high bandwidth
high speed
packet switching
real time
routing algorithm
highly efficient
high throughput
end to end
massive scale
low cost
response time
continuous query processing
power dissipation
virtual machine
multi dimensional