A 12-Bit 31.1UW 1MS/S SAR ADC with On-Chip Input-Signal-Independent Calibration Achieving 100.4DB SFDR Using 256FF Sampling Capacitance.
Junhua ShenAkira ShikataAnping LiuFrederick ChalifouxPublished in: VLSI Circuits (2018)
Keyphrases
- high speed
- analog to digital converter
- high frequency
- received signal
- single chip
- low cost
- low power
- electro optic
- signal processing
- camera calibration
- sigma delta
- synthetic aperture radar
- random access memory
- signal acquisition
- heuristic search
- compressive sampling
- control signals
- frequency domain
- image reconstruction
- band limited
- wide dynamic range
- phased array
- automatic target recognition
- sampled data
- high density
- focal length
- random sampling
- sar images
- mixed signal
- noise ratio
- signal to noise ratio
- multi view