Implementation of a Gate-Level Evolvable Hardware Chip.
Masaya IwataIsamu KajitaniYong LiuNobuki KajiharaTetsuya HiguchiPublished in: ICES (2001)
Keyphrases
- evolvable hardware
- evolutionary computation
- evolutionary algorithm
- lossless image compression
- bio inspired
- reconfigurable hardware
- digital circuits
- image filters
- cmos technology
- hardware implementation
- fault tolerant
- circuit design
- efficient implementation
- parallel processing
- query optimization
- genetic programming
- design methodology
- physical design
- low cost