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Improving performance of NEM relay logic circuits using integrated charge-boosting flip flop.
Ramakrishnan Venkatasubramanian
Sujan K. Manohar
Poras T. Balsara
Published in:
NANOARCH (2011)
Keyphrases
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logic circuits
power dissipation
low power
flip flops
power consumption
functional decomposition
tunnel diode
gate array
pattern recognition
finite state machines
digital signal processing
image segmentation
real time
multiple input
high speed
low cost
hidden markov models