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A 6-GSamples/s multi-level decision feedback equalizer embedded in a 4-bit time-interleaved pipeline A/D converter.
Aida Varzaghani
Chih-Kong Ken Yang
Published in:
IEEE J. Solid State Circuits (2006)
Keyphrases
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decision feedback
error propagation
multipath
soft decision
intersymbol interference
bit error rate
computational complexity
multiresolution
packet loss
transfer function