A Design Methodology for Performance Maintenance of 3D Network-on-Chip with Multiplexed Through-Silicon Vias.
Mostafa SaidFarhad MehdipourKazuaki J. MurakamiMohamed El-SayedPublished in: MES@ISCA (2014)
Keyphrases
- design methodology
- network on chip
- high density
- power dissipation
- cmos technology
- routing algorithm
- design process
- multi processor
- fuzzy neural network
- integrated circuit
- object oriented
- high speed
- network simulator
- data transfer
- low cost
- data center
- databases
- database
- power consumption
- mobile ad hoc networks
- interconnection networks
- neural network