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Live Demo: An 88fJ / 40 MHz [0.4V] - 0.61pJ / 1GHz [0.9V] Dual Mode Logic 8×8-Bit Multiplier Accumulator with a Self-Adjustment Mechanism in 28 nm FD-SOI.
Ramiro Taco
Itamar Levi
Marco Lanuzza
Alexander Fish
Published in:
ISCAS (2019)
Keyphrases
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high speed
flip flops
nm technology
silicon on insulator
cmos technology
random access memory
logic programming
hough transform
real time
image quality
rate distortion
power consumption
floating point
classical logic
fpga device