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A 2.9-to-4.0GHz fractional-N digital PLL with bang-bang phase detector and 560fsrms integrated jitter at 4.5mW power.

Davide TascaMarco ZanusoGiovanni MarzinSalvatore LevantinoCarlo SamoriAndrea L. Lacaita
Published in: ISSCC (2011)
Keyphrases
  • power consumption
  • low power
  • high speed
  • neural network
  • higher order
  • detection algorithm
  • power reduction