Combinational Logic Circuit Protection Using Customized Error Detecting and Correcting Codes.

Avijit Dutta Abhijit Jas

Published in: ISQED (2008)

Keyphrases

error detection
reed solomon codes
high speed
error rate
error correction
error analysis
information systems
motion estimation
error bounds
critical infrastructure
circuit design
decoding algorithm
error correcting codes
analog circuits
delay insensitive