Layout-conscious random topologies for HPC off-chip interconnects.

Michihiro Koibuchi Ikki Fujiwara Hiroki Matsutani Henri Casanova

Published in: HPCA (2013)

Keyphrases

power dissipation
high performance computing
cmos technology
high speed
low cost
input output
power consumption
fault tolerance
high density
circuit design
uniformly distributed
vlsi implementation
real time
genetic algorithm
low power
evolvable hardware