A novel low power, variable resolution pipelined ADC.
Mahesh Kumar AdimulamSreehari VeeramachaneniM. B. SrinivasPublished in: SoCC (2009)
Keyphrases
- low power
- variable resolution
- single chip
- low cost
- power consumption
- multiresolution
- high speed
- analog to digital converter
- state space
- low power consumption
- wide dynamic range
- digital signal processing
- logic circuits
- power reduction
- state abstraction
- data flow
- mixed signal
- vlsi circuits
- log polar
- image sensor
- cmos technology
- data reduction