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Low power passive equalizer optimization using tritonic step response.
Ling Zhang
Wenjian Yu
Haikun Zhu
Alina Deutsch
George A. Katopis
Daniel M. Dreps
Ernest S. Kuh
Chung-Kuan Cheng
Published in:
DAC (2008)
Keyphrases
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low power
power consumption
low cost
high speed
single chip
computer simulation
low power consumption
digital signal processing
wireless transmission
logic circuits
vlsi architecture
vlsi circuits
high power
image sensor
gate array
real time
delay insensitive
power saving
signal processor
digital camera