Architecture of a high-performance stereo vision VLSI processor.
Masanori HariyamaSeunghwan LeeMichitaka KameyamaPublished in: Adv. Robotics (2000)
Keyphrases
- stereo vision
- depth information
- high speed
- stereo matching
- obstacle detection
- vision system
- stereo images
- computation intensive
- driver assistance
- stereo camera
- single chip
- parallel architecture
- structured environments
- depth estimation
- instruction set
- distributed memory
- real time
- embedded dram
- confidence measures
- disparity map
- pairwise
- high quality
- machine learning