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DGECS: Description Generator for Evolved Circuits Synthesis.
Fabio Cancare
Davide B. Bartolini
Matteo Carminati
Donatella Sciuto
Marco D. Santambrogio
Published in:
IPDPS Workshops (2012)
Keyphrases
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analog circuits
logic synthesis
high level
mechanical devices
circuit design
vlsi circuits
neural network
delay insensitive
data sets
multiscale
high speed
fault diagnosis
structural analysis
program synthesis
tunnel diode