An low-energy 8T dual-port SRAM for image processor with selective sourceline drive scheme in 28-nm FD-SOI process technology.
Haruki MoriTomoki NakagawaYuki KitaharaYuta KawamotoKenta TakagiShusuke YoshimotoShintaro IzumiHiroshi KawaguchiMasahiko YoshimotoPublished in: ICECS (2016)