On-chip implementation of memory mapping algorithm to support flexible decoder architecture.
Saeed-ur RehmanAwais SaniPhilippe CoussyCyrille ChavetPublished in: ICASSP (2013)
Keyphrases
- hardware implementation
- memory usage
- vlsi implementation
- detection algorithm
- dynamic programming
- objective function
- fpga implementation
- computational complexity
- software implementation
- hardware architecture
- analog vlsi
- level parallelism
- memory space
- optimal solution
- parallel implementation
- single pass
- associative memory
- low cost
- np hard
- k means
- vlsi architecture
- image sequences
- learning algorithm