Characterization of a pseudo-DRAM Crossbar Computational Memory Array in 55nm CMOS : (Invited Paper).
Gaspar TognettiJonah SenguptaPhilippe O. PouliquenAndreas G. AndreouPublished in: CISS (2019)
Keyphrases
- invited paper
- random access memory
- embedded dram
- low voltage
- dynamic random access memory
- cmos technology
- main memory
- silicon on insulator
- computational power
- design considerations
- memory subsystem
- image sensor
- high speed
- nm technology
- low power
- power dissipation
- focal plane
- low cost
- high density
- scheduling algorithm
- memory access
- information retrieval
- power consumption
- artificial neural networks