An MTJ-based nonvolatile associative memory architecture with intelligent power-saving scheme for high-speed low-power recognition applications.
Yitao MaTadashi ShibataTetsuo EndohPublished in: ISCAS (2013)
Keyphrases
- low power
- associative memory
- power consumption
- power saving
- high speed
- power reduction
- vlsi implementation
- vlsi architecture
- energy efficiency
- energy saving
- kohonen feature map
- neural network
- low cost
- cmos technology
- data center
- digital signal processing
- neural network model
- mixed signal
- end to end
- activity recognition
- wireless sensor networks