Design of 2.5 V/5 V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit.

Ming-Dou Ker Chia-Sheng Tsai

Published in: ISCAS (5) (2003)

Keyphrases

circuit design
low voltage
clock gating
power consumption
cmos technology
field effect transistors
power dissipation
high speed
read write
chip design
metal oxide semiconductor
cmos image sensor
analog vlsi
electronic circuits
logic circuits
digital circuits
power supply