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Trace-Driven Simulation and Design Space Exploration of Network-on-Chip Topologies on FPGA.
G. S. Sangeetha
Vignesh Radhakrishnan
Prabhu B. M. Prasad
Khyamling Parane
Basavaraj Talawar
Published in:
ISED (2018)
Keyphrases
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design space exploration
network on chip
network simulator
design space
computer architecture
design process
simulation model
high speed
routing algorithm
case study
hardware implementation
hardware and software
multi processor
hardware software
signal processing
low cost
computer science