A 12 bit 2.9 GS/s DAC With IM3 ≪ -60 dBc Beyond 1 GHz in 65 nm CMOS.
Chi-Hung LinFrank M. L. van der GoesJan R. WestraJan MulderYu LinErol ArslanEmre AyranciXiaodong LiuKlaas BultPublished in: IEEE J. Solid State Circuits (2009)
Keyphrases
- clock gating
- power consumption
- power dissipation
- low power
- nm technology
- power reduction
- high speed
- cmos technology
- random access memory
- power management
- max csp
- analog to digital converter
- metal oxide semiconductor
- silicon on insulator
- digital signal processing
- hardware implementation
- collaborative learning
- low cost