An efficient algorithm for frequency-weighted balanced truncation of VLSI interconnects in descriptor form.
Vinita VasudevanM. RamakrishnaPublished in: DAC (2015)
Keyphrases
- detection algorithm
- learning algorithm
- optimization algorithm
- experimental evaluation
- computationally efficient
- computational cost
- dynamic programming
- matching algorithm
- k means
- significant improvement
- cost function
- np hard
- computational complexity
- times faster
- probabilistic model
- segmentation algorithm
- local binary pattern
- parallel implementation
- expectation maximization
- high speed
- high accuracy
- worst case
- preprocessing
- search algorithm
- search space
- clustering method
- multiscale
- feature extraction