Design of High-Performance CMOS Level Converters Considering PVT Variations.

Jinn-Shyan Wang Yu-Juey Chang Chingwei Yeh

Published in: IEICE Trans. Electron. (2011)

Keyphrases

data sets
circuit design
optimal design
building blocks
high speed
information systems
real time
user interface
low cost
design process
design considerations
single chip
high level
case study
higher level
power consumption
engineering design
design decisions
neural network
design space