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A 50.8-53-GHz Clock Generator Using a Harmonic-Locked PD in 0.13- mum CMOS.
Chihun Lee
Lan-Chou Cho
Jia-Hao Wu
Shen-Iuan Liu
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2008)
Keyphrases
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high speed
power consumption
low power
clock frequency
real time
multiscale
low cost
focal plane
partial discharge
image processing
data generator