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Nonvolatile SRAM Using Fishbone-in-Cage Capacitor in a 180 nm Standard CMOS Process for Zero-Standby and Instant-Powerup Embedded Memory on IoT.

Takaki UrabeHiroyuki OchiKazutoshi Kobayashi
Published in: COOL CHIPS (2021)
Keyphrases
  • dynamic random access memory
  • power consumption
  • management system
  • embedded systems
  • memory subsystem
  • data analysis
  • low power
  • memory usage
  • random access
  • flash memory